Efficiency of cache mechanism for network processors
نویسندگان
چکیده
منابع مشابه
Efficiency of Cache Mechanism for Network Processors
With the explosion of network bandwidth and the ever-changing requirements for diverse network-based applications, the traditional processing architectures, i.e., general purpose processor (GPP) and application specific integrated circuits (ASIC) cannot provide sufficient flexibility and high performance at the same time. Thus, the network processor (NP) has emerged as an alternative to meet th...
متن کاملassessment of the efficiency of s.p.g.c refineries using network dea
data envelopment analysis (dea) is a powerful tool for measuring relative efficiency of organizational units referred to as decision making units (dmus). in most cases dmus have network structures with internal linking activities. traditional dea models, however, consider dmus as black boxes with no regard to their linking activities and therefore do not provide decision makers with the reasons...
Cache Memory Design for Network Processors
The exponential growth in Internet traffic has motivated the development of a new breed of microprocessors called Network Processors, which are designed to address the performance problem resulting from exploding Internet traffic. The development efforts of these network processors concentrate almost exclusively on streamlining their data-paths to speed up network packet processing, which mainl...
متن کاملAn Improved Cache Mechanism for a Cache-based Network Processor
Internet traffic has increased due to the development of richer web content and services. In particular, IP telephony, Messengers, and Twitter are composed of a large number of small packets, and these services are expected to increase. Thus, routers need to handle largebandwidth fine-grain communication. We proposed a network processor called P-Gear, which has a special cache mechanism that re...
متن کاملA Scalable, Cache-Based Queue Management Subsystem for Network Processors
Abstract— Queues are a fundamental data structure in packet processing systems. In this short paper, we propose and discuss a scalable queue management (QM) building block for network processors (NPs). We make two main contributions: 1) we argue qualitatively and quantitatively that caching can be used to improve both bestand worst-case queuing performance, and 2) we describe and discuss our pr...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: Tsinghua Science and Technology
سال: 2009
ISSN: 1007-0214
DOI: 10.1016/s1007-0214(09)70120-8